33 | | * ('''M''')edium setup for run-time optimization tests, and verification of the code efficiency on the MOSAIK [wiki:idefix demonstration PC] |
34 | | * ('''L''')arge setup for ''code scalability'' tests on a high-performance computing system ([https://www.hlrn.de/home/view HLRN]) with up to tens of thousands processor cores (see Fig. 3. |
35 | | The base of PALM-4U -- [https://palm.muk.uni-hannover.de/trac PALM] -- is highly optimized and its performance scales well up to 40,000 processor cores. PALM-4U shall maintain this high level of performance optimization. |
| 33 | * ('''M''')edium setup (see Fig. 3) for run-time optimization tests, and verification of the code efficiency on the MOSAIK [wiki:idefix demonstration PC] |
| 34 | * ('''L''')arge setup (see Fig. 4) for ''code scalability'' tests on a high-performance computing system ([https://www.hlrn.de/home/view HLRN]) with up to tens of thousands processor cores. |
| 35 | The base of PALM-4U -- [https://palm.muk.uni-hannover.de/trac PALM] -- is highly optimized and its performance scales well up to 40,000 processor cores. PALM-4U shall maintain this high level of performance optimization.\\ |
| 36 | |
| 37 | The final formulation of setup files is postponed until the new INPUT data structure is implemented to PALM.\\\\ |
| 38 | |
| 39 | {{{#!table align=left style="border: none; text-align:left" |
| 40 | {{{#!tr |
| 41 | {{{#!td align=left style="border: none; vertical-align:top; width: 48%" |
| 42 | [[Image(medium_complex_setup.png, 100%, left, border=2, nolink)]]\\ |
| 43 | Fig. 3: ('''M''')edium simulation domain with O(10^6^} grid points, suitable for tests on demonstration PC). |
| 44 | }}} |
| 45 | {{{#!td align=left style="border: none; vertical-align:top; width: 52%" |
| 46 | [[Image(large_complex_setup.png, 100%, left, border=2, nolink)]]\\ |
| 47 | Fig. 4: ('''L''')arge simulation domain with O(10^10^} grid points, suitable for scalability tests). |
| 48 | }}} |
| 49 | }}} |
| 50 | }}} |